February 2, 2026
Modular trapped-ion quantum computing hardware, known as Quantum Charge Coupled Devices (QCCDs) require shuttling operations in order to maintain effective all-to-all connectivity. Unlike their superconducting counterparts, the design space for QCCDs is relatively flexible and can be explored beyond the constraints of two-dimensional grids. In particular, current grid-based architectures significantly limit the performance of many promising, high-rate codes such as hypergraph product codes and bivariate bicycle codes. Many of these codes are highly parallelizable, meaning that with appropriate hardware layouts and matching software schedules, execution latency can be greatly reduced. Faster execution, in turn, reduces error accumulation from decoherence and heating, ultimately improving code performance when mapped to realistic hardware. However, current 2D grid designs suffer from numerous trap to trap “roadblocks”, forcing serialization and destroying the inherent parallelism of these codes. To address this, we propose Cyclone, a circular software-hardware codesign that departs from traditional 2D grids in favor of a flexible ring topology, where ancilla qubits move in lockstep. Cyclone eliminates roadblocks, bounds total movement, and enables high levels of parallelism, resulting in up to 4× speedup in execution times. With hypergraph product codes, Cyclone achieves up to a 2× order of magnitude improvement in logical error rate, and with bivariate bicycle codes, this improvement reaches up to a 3× in order of magnitude. Spatially, Cyclone reduces the number of required traps and ancilla qubits by 2×.
This paper presented by Sahil Khan at HPCA 2026. Read the preprint here https://arxiv.org/abs/2511.15910